Performance
The Write Accelerator connects to
servers or network fabrics through basic Fibre Channel or InfiniBand interfaces and appears
simply as a very fast disk to the network, able to act as any disk
or storage system might. The Write Accelerator acheives dramatic performance
gains in Oracle redo logs, temporary tablespaces, and undo segments.
Reliability
The Write Accelerator solution incorporates two individual solid state disk systems mirrored in host-side or Oracle ASM configurations, providing the highest degree of data protection and system reliability. In addition, each individual unit of the Write Accelerator solution includes multiple reliability features, including hot swappable power supplies and backup hard disks, redundant cooling fans, batteries, and optional redundant failover data ports. ChipKill technology, ECC and soft error scrubbing, and Active Backup, as noted below, are also part of the Write Accelerator’s suite of sophisticated reliability features.
Interoperability
The Write Accelerator is designed to look like a disk to
the network. It is highly interoperable and works in
virtually any enterprise environment. It is installed in numerous
environments, including AIX, Solaris, HP-UX, OpenVMS, Tandem, Linux, and Windows.
Hardware from Fibre Channel and InfiniBand vendors including Cisco, Emulex, Brocade,
McData, Mellanox, QLogic, LSI Logic, and ATTO easily interoperates with the
Write Accelerator.
Active Backup
The Write Accelerator includes the reliability and fuctionality of Active Backup®. Other
SSDs and cache systems can only "destage" data from RAM to
backup disks once power is already lost. This means that data is never
backed up during normal operation and the time-to-complete-backup after
power loss is unacceptably long. A Write Accelerator with Active Backup can
continuously back up data on RAM to the internal backup hard disks
without impacting performance. This means in an emergency situation
data is anywhere from 60-100% on the backup hard drives already.
Chipkill Technology
Write Accelerator systems take reliability even farther by implementing IBM
Chipkill technology. Standard error correcting code (ECC)
implementations correct single-bit data errors in memory chips but
cannot correct the multi-bit errors that can result in data integrity
issues. Chipkill technology allows a memory system to correct a
multi-bit failure up to and including a total chip failure.
Soft Error Scrubbing
All solid state disks can correct a single bit error before sending data to
the server as a part of their ECC protection. The Write Accelerator, however, goes
a step further by scrubbing, re-writing the corrected data to memory and then
verifying the re-write to determine if a memory chip has a failure (a hard
error) or if radiation transients caused the single bit error (a soft error).
Systems that do not scrub single bit memory errors will either a) report
errors to a system log that will eventually encourage replacement of a memory
board or b) hide these errors thus leaving a potentially unsafe memory board
in the system. Research on this topic suggests that 90% of single bit errors
are soft errors. In these cases, the Write Accelerator will correct the error
through the scrubbing process and prevent unnecessary downtime to replace
the memory board.
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